发明公开
EP0026276A1 Method for making filamentary pedestal transistors 失效
一种用于制造丝状基座晶体管的过程。

Method for making filamentary pedestal transistors
摘要:
A method for making a bipolar filamentary pedestal transistor having reduced base-collector capacitance attributably to the elimination of the extrinsic base-collector junction. Silicon is deposited upon a coplanar oxide-silicon surface in which only the top silicon surface of the buried collector pedestal (3) is exposed through the oxide (4). Epitaxial silicon forming the intrinsic base region (9) deposits only over the exposed pedestal surface while polycrystalline silicon forming the extrinsic base region (8) deposits over the oxide surface. The polycrystalline silicon is etched away except in the base region. An emitter is formed in the base region and contacts are made to the emitter, base and collector regions.
公开/授权文献
信息查询
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L29/00 专门适用于整流、放大、振荡或切换,并具有至少一个电位跃变势垒或表面势垒的半导体器件;具有至少一个电位跃变势垒或表面势垒,例如PN结耗尽层或载流子集结层的电容器或电阻器;半导体本体或其电极的零部件(H01L31/00至H01L47/00,H01L51/05优先;除半导体或其电极之外的零部件入H01L23/00;由在一个共用衬底内或其上形成的多个固态组件组成的器件入H01L27/00)
H01L29/02 .按其半导体本体的特征区分的
H01L29/06 ..按其形状区分的;按各半导体区域的形状、相对尺寸或配置区分的
H01L29/08 ...具有连接到1个通有待整流、放大或切换的电流的电极上去的半导体区域的;并且这样的电极又是包含3个或更多个电极的半导体器件的组成部分的
0/0