发明公开
EP0089503A2 Method for making a high performance bipolar transistor in an integrated circuit
失效
一种用于在集成电路中制造高品质的双极型晶体管的方法。
- 专利标题: Method for making a high performance bipolar transistor in an integrated circuit
- 专利标题(中): 一种用于在集成电路中制造高品质的双极型晶体管的方法。
-
申请号: EP83101755.3申请日: 1983-02-23
-
公开(公告)号: EP0089503A2公开(公告)日: 1983-09-28
- 发明人: Gaur, Santosh Prasad , Lechaton, John S. , Srinivasan, Gurumakonda R.
- 申请人: International Business Machines Corporation
- 申请人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 代理机构: Mönig, Anton, Dipl.-Ing.
- 优先权: US360731 19820322
- 主分类号: H01L29/10
- IPC分类号: H01L29/10 ; H01L29/72
摘要:
A process is described which permits the fabrication of very narrow base width bipolar transistors. The ability to selectively vary the transistor characteristics provides a degree of freedom for design of integrated circuits. The biplar transistor is processed up to the point of emitter formation using conventional techniques. But, prior to the emitter formation, a portion of the base area (22) wherein the emitter region (34) is planned to be formed is dry etched using reactive ion etching. The existing silicon nitride/silicon dioxide layers (24, 26) with the emitter opening (30) therein are used as the etching mask for this reactive ion etching procedure. Once the etching is completed to the desired depth, the normal processing is resumed to form the emitter and rest of the metallization. Since the intrinsic base under the emitter (34) is etched, and the normal emitter is formed afterwards, the etching reduces the base width by an amount approximately equal to the etched depth. The transistor characteristics depend strongly upon the base width so the etching is controlled to very tight dimensions.
公开/授权文献
信息查询
IPC分类: