公开(公告)号：EP2901492A4

公开(公告)日：2016-06-22

申请号：EP13840678

申请日：2013-09-20

申请人： PST SENSORS PTY LTD

发明人： BRITTON DAVID THOMAS ,  HÄRTING MARGIT ,  WALTON STANLEY DOUGLAS

IPC分类号： H01C7/10 ,  H01L29/72 ,  H01L49/02 ,  H01L51/00

CPC分类号： H01L29/705 ,  H01C7/1013 ,  H01L29/04 ,  H01L29/0692 ,  H01L29/72 ,  H01L49/02 ,  H01L51/0036 ,  H01L51/0037 ,  H01L51/0504

公开(公告)号：EP3017477A1

公开(公告)日：2016-05-11

申请号：EP14819416.0

申请日：2014-07-02

申请人： Texas Instruments Incorporated

发明人： EDWARDS, Henry, Litzmann ,  SALMAN, Akram, A.

IPC分类号： H01L29/72 ,  H01L21/331

CPC分类号： H01L29/7322 ,  H01L27/0248 ,  H01L27/0259 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/732

摘要： In described examples, a bipolar transistor (100) includes: a substrate (105) having a semiconductor surface (106); and first and second trench enclosures (121, 122), both at least lined with a dielectric extending downward from a topside (106a) of the semiconductor surface (106) to a trench depth. The first trench enclosure (121) defines an inner enclosed area. A base (140) and an emitter (150) formed in the base (140) are within the inner enclosed area. A buried layer (126) is below the trench depth, including under the base (140). A sinker diffusion (115) includes a first portion (115a) between the first and second trench enclosures (121, 122), extending from the topside (106a) of the semiconductor surface (106) to the buried layer, and a second portion (115b) within the inner enclosed area. The second portion (115b) does not extend to the topside (106a) of the semiconductor surface (106).

摘要翻译： 双极晶体管包括具有半导体表面的衬底，第一沟槽外壳和在第一沟槽外壳外部的第二沟槽外壳，其至少内衬有从半导体表面向下延伸到沟槽深度的电介质，其中第一沟槽外壳限定 内封闭区域。 形成在基座中的基座和发射体在内封闭区域内。 掩埋层位于底部下方的沟槽深度之下。 沉降片扩散包括从半导体表面的顶侧延伸到掩埋层的第一和第二沟槽外壳之间的第一部分和内部封闭区域内的第二部分，其中第二部分不延伸到半导体表面的顶侧 。

公开(公告)号：EP2214198A3

公开(公告)日：2010-08-18

申请号：EP10158458.9

申请日：2003-08-13

申请人： Advanced Analogic Technologies, Inc.

发明人： Williams, Richard K. ,  Cornell, Michael E. ,  Chan, Wai Tien

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L21/3205 ,  H01L21/332 ,  H01L21/336 ,  H01L21/425 ,  H01L29/72 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L21/26513 ,  H01L21/743 ,  H01L21/761 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0928 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/6625 ,  H01L29/735 ,  H01L29/7816 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

摘要： A process of fabricating a semiconductor device is disclosed comprising providing a semiconductor substrate of a first conductivity type, the substrate not containing an epitaxial layer; forming a first mask on a surface of the substrate, said first mask having a first opening defining a location of a first deep layer in a lateral dimension; implanting a dopant of a second conductivity type through the first opening to form the first deep layer; forming a second mask on the surface of the substrate, said second mask having a second opening defining a location of a second deep layer in the lateral dimension, a width of the second opening being less that a width of the first opening; and implanting dopant of the first conductivity type through the second opening to form the second deep layer. The projected range of the implant of dopant of the first conductivity type is less than the projected range of the implant of dopant of the second conductivity type such that the second deep layer overlaps and extends above the first deep layer. Alternatively, the projected range of the implant of dopant of the first conductivity type is greater than the projected range of the implant of dopant of the second conductivity type such that the second deep layer overlaps and extends below the first deep layer.

公开(公告)号：EP0904603B1

公开(公告)日：2008-09-10

申请号：EP97915797.1

申请日：1997-03-18

申请人： CREE, INC.

发明人： HARRIS, Christopher ,  KONSTANTINOV, Andrei ,  JANZEN, Erik

IPC分类号： H01L29/24 ,  H01L29/72 ,  H01L29/78 ,  H01L21/20

CPC分类号： H01L29/1608 ,  H01L29/66068 ,  H01L29/7397

摘要： An IGBT of SiC comprises superimposed a drain (1), a highly doped p-type substrate layer (2), a highly doped n-type buffer layer (3), a low doped n-type drift layer (4), a highly doped p-type base layer (5), a highly doped n-type source region layer (6) and source (7). The transistor also comprises a vertical trench (8) extending through the source region layer and the base layer and to the drift layer. It also comprises an additional low doped p-type layer (13) arranged laterally to the base layer, connecting it to an insulating layer (11) and extending vertically at least over the extension of the base layer. A gate electrode (12) is applied on the insulating layer for, upon applying a voltage to the gate electrode, forming a conducting inversion channel at the interface between said additional layer (13) and the insulating layer for electron transport from the source to the drain.

公开(公告)号：EP0749632B1

公开(公告)日：2006-08-30

申请号：EP95908032.6

申请日：1995-01-12

申请人： HONEYWELL INC.

发明人： BAXTER, Ronald, D. ,  CONNERY, James, G. ,  FOGEL, John, D. ,  SILVERTHORNE, Spencer, W.

IPC分类号： H01L21/70 ,  H01L29/72 ,  H01L27/02 ,  G01N27/414

CPC分类号： H01L27/0251 ,  G01N27/4148 ,  H01L27/0248 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods, apparatus and chip fabrication techniques are described which provide electrostatic discharge (ESD) protection to ion-sensitive field effect transistors (ISFET) based device (250) used to selectively measure ions in liquid (299). According to one aspect of the invention, an ESD protection circuit, made up of conventional protective elements (201, 202, 206), is integrated onto the same silicon chip on which ISFET (250) is formed, along with interface (203) that is in contact with liquid (299) being measured and which does not open up paths for D.C. leakage currents between ISFET (250) and liquid (299). According to a preferred embodiment of the invention, a capacitor structure is used as interface (203) between protection circuit (201, 202, 206) and liquid sample (299). Further aspects of the invention are directed to methods per se for providing ESD protection for ISFET sensors utilizing interface means (203) (e.g., capacitor structure) referred to hereinabove, and processes for fabricating the novel interface on a silicone wafer.

公开(公告)号：EP1538673A1

公开(公告)日：2005-06-08

申请号：EP03794280.2

申请日：2003-09-08

申请人： Sanyo Electric Co., Ltd.

发明人： ASANO, Tetsuro ,  SAKAKIBARA, Mikito ,  HIRAI, Toshikazu

IPC分类号： H01L27/04 ,  H01L29/861 ,  H01L29/80 ,  H01L29/72

CPC分类号： H01L27/0255 ,  H01L24/48 ,  H01L27/0248 ,  H01L27/0288 ,  H01L29/66098 ,  H01L29/80 ,  H01L29/812 ,  H01L29/861 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n + -type region - insulating region - second n + -type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n + regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

公开(公告)号：EP0361589B1

公开(公告)日：2001-12-19

申请号：EP89202351.6

申请日：1989-09-18

申请人： Koninklijke Philips Electronics N.V.

发明人： Mukherjee, Satyetdranath ,  Tsui, Paul Gin-Yea

IPC分类号： H01L29/08 ,  H01L29/72 ,  H01L29/41

CPC分类号： H01L29/7393 ,  H01L29/0834 ,  H01L29/7839

公开(公告)号：EP0280535B1

公开(公告)日：2001-07-18

申请号：EP88301592.7

申请日：1988-02-24

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Nakagawa, Akio c/o Patent Division ,  Yamaguchi, Yoshihiro c/o Patent Office ,  Watanabe, Kiminori c/o Patent Office

IPC分类号： H01L29/72 ,  H01L29/06 ,  H01L29/78

CPC分类号： H01L29/405 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7455

公开(公告)号：EP0634796B1

公开(公告)日：2000-10-04

申请号：EP94110811.0

申请日：1994-07-12

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Matsuda, Tadashi

IPC分类号： H01L29/72 ,  H01L29/08

CPC分类号： H01L29/7395 ,  H01L29/0834

公开(公告)号：EP0735594B1

公开(公告)日：2000-07-19

申请号：EP96104979.8

申请日：1996-03-28

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Nedo, Koichi

IPC分类号： H01L29/861 ,  H01L29/72 ,  H01L21/762

CPC分类号： H01L29/7392 ,  H01L21/76297 ,  H01L29/861