发明公开
EP0169782A3 Multiple phase-splitter TTL output circuit with improved drive characteristics
失效
具有改进驱动特性的多相分相器TTL输出电路
- 专利标题: Multiple phase-splitter TTL output circuit with improved drive characteristics
- 专利标题(中): 具有改进驱动特性的多相分相器TTL输出电路
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申请号: EP85401473申请日: 1985-07-18
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公开(公告)号: EP0169782A3公开(公告)日: 1987-06-03
- 发明人: Ferris, David A. , Caswell, Richard J.
- 申请人: FAIRCHILD CAMERA & INSTRUMENT CORPORATION
- 专利权人: FAIRCHILD CAMERA & INSTRUMENT CORPORATION
- 当前专利权人: FAIRCHILD CAMERA & INSTRUMENT CORPORATION
- 优先权: US632433 19840719
- 主分类号: H03K19/088
- IPC分类号: H03K19/088 ; H03K19/013
摘要:
A multiple phase-splitter TTL tristate output circuit having a feedback diode coupled between the signal output and the collector of a first phase-splitter transistor to accelerate sinking of current from the output to low potential during transition of binary signals at the output from high to low potential. An independent base drive is coupled to the base of the first phase-splitter transistor independent from any base drive coupled to the other phase-splitter transistor or transistors. Current hogging of the base drive current to the first phase-splitter transistor by the other phase-splitter transistors is thereby prevented. The first phase-splitter transistor which is coupled in the feedback circuit with the accelerating feedback diode to the base of the pulldown transistor element can therefore maintain the high current sinking mode through the pulldown transistor element with gain step-up proportional to β wnen the output is at the high voltage level.
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