A differential coding circuit including a subtractor (7,8). a quantizer (3) for quantizing a differential signal (D) from the subtractor (1), and a predicted signal generating circuit (4,5,6) for generating a predicted signal on the basis of a quantized differential signal from the quantizer (3). The subtractor (7,8) subtracts the quantized differential signal of the quantizer (3) and the predicted signal from the sampled input signal (A). The critical path of the circuit is shortened, therefore the operation speed of the differential coding circuit increases.