公开(公告)号：EP0173983A3

公开(公告)日：1988-06-08

申请号：EP85110978

申请日：1985-08-30

申请人： FUJITSU LIMITED

发明人： Okazaki, Takeshi ,  Tsuda, Toshitaka 3-304, Minaminomachi ,  Maki, Shinichi Moegino Haitsu 105 ,  Matsuda, Kiichi Shibue-so 7 ,  Gambe, Hirohisa ,  Fukui, Hirokazu ,  Ikezawa, Toshi

IPC分类号： H03M03/04

CPC分类号： H03M7/3044 ,  G06T9/004

摘要： A differential coding circuit including a subtractor (7,8). a quantizer (3) for quantizing a differential signal (D) from the subtractor (1), and a predicted signal generating circuit (4,5,6) for generating a predicted signal on the basis of a quantized differential signal from the quantizer (3). The subtractor (7,8) subtracts the quantized differential signal of the quantizer (3) and the predicted signal from the sampled input signal (A). The critical path of the circuit is shortened, therefore the operation speed of the differential coding circuit increases.