发明公开
EP0199497A2 Process for fabricating a self-aligned bipolar transistor
失效
制造双极晶体管selbtsausrichtenden的方法。
- 专利标题： Process for fabricating a self-aligned bipolar transistor
- 专利标题（中）： 制造双极晶体管selbtsausrichtenden的方法。
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申请号： EP86302631.6申请日： 1986-04-09
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公开(公告)号： EP0199497A2公开(公告)日： 1986-10-29
- 发明人: Hideshima, Osamu , Goto, Hiroshi
- 申请人： FUJITSU LIMITED
- 申请人地址： 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 JP
- 专利权人： FUJITSU LIMITED
- 当前专利权人： FUJITSU LIMITED
- 当前专利权人地址： 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 JP
- 代理机构： Skone James, Robert Edmund
- 优先权： JP76055/85 19850410; JP137694/85 19850626; JP182262/85 19850820
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L21/28 ; H01L21/285 ; H01L21/265 ; H01L29/10
摘要：
Using a single mask pattern (36,37) on a semiconductor substracte (31), a doped base contact region (39) adjacent the surface of the.substrate, a buried insulating region (38) below the base contact region, and an insulating layer (40) on the base contact region are formed. Optionally, a metal or metal silicide base-electrode-taking-out is formed on the base contact region. Doped emitter (44) and intrinsic base (41) regions are formed below the mask pattern. A collector region (33) is defined by the base contact region and the buried insulating layer to be therebetween i.e. below the mask pattern. Hence, the bipolar transistor formed thereby has a size which is no larger than necessary, thereby reducing the collector-base capacitance, the base resistance, and the size of the device.
公开/授权文献
- EP0199497B1 Process for fabricating a self-aligned bipolar transistor 公开/授权日：1992-01-02
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