An image processing apparatus includes a digital data output device (1, 2) for outputting bi-level image data, a bi-level processor (4) for converting the bi-level image data into multi-level (eg 8-bit) image data, a multi-level processor (4) for performing spatial filter processing with respect to the multi-level image data output from the bi-level processor, and a PWM circuit (5) for processing the multi-level image data output from the multi-level processor using a pattern signal of a predetermined cycle and generating a PWM signal.