Transparent cache memory for data processing system in which a central processing unit requests the read out of an information contained in a working memory at a current address and immediately receives, whithout waiting, the requested information from the cache memory, if the requested information contained in the cache memory and meanwhile the cache memory performs the reading and the storing into the cache, of an information contained in the working memory at the address next following the current address, so as to advance a possible subsequent request of the central processing unit. If the requested information is not contained in the cache memory, the cache memory performs a double memory read in page mode at the current memory address and at the next following address, thus minimizing the occupation times of the memory. The double reading is performed only for those addresses which allow for page mode operation.