发明公开
- 专利标题: Dual-tracking phase-locked loop
- 专利标题(中): 双跟踪相位锁定双向跟踪锁相环
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申请号: EP89301235.1申请日: 1989-02-09
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公开(公告)号: EP0328378A3公开(公告)日: 1990-06-06
- 发明人: Devries, Paul Arthur
- 申请人: NORTHERN TELECOM LIMITED
- 申请人地址: 600 de la Gauchetiere Street West Montreal Quebec H3B 4N7 CA
- 专利权人: NORTHERN TELECOM LIMITED
- 当前专利权人: NORTHERN TELECOM LIMITED
- 当前专利权人地址: 600 de la Gauchetiere Street West Montreal Quebec H3B 4N7 CA
- 代理机构: Beresford, Keith Denis Lewis
- 优先权: US155575 19880212
- 主分类号: H03L7/08
- IPC分类号: H03L7/08 ; H03L7/14 ; H04J3/06
摘要:
A dual-tracking phase-locked loop circuit is provided for moving with minimum disruption from conventional PLL operation to processor-controlled tracking of another closely related clock. In addition to conventional PLL components the circuit comprises a processor-controlled up/down counter which may operate alternatively as a link in the loop or as providing the base-line frequency determining value at the time of transition from PLL to processor-controlled tracking operation, thereby ensuring none disruptive transition.
公开/授权文献
- EP0328378A2 Dual-tracking phase-locked loop 公开/授权日:1989-08-16
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