A gate pulse generator for a static var compensator (SVC) constituted by a thyristor switched capacitor (TSC) comprises voltage detectors (5u, 5x) for respec­tively detecting forward and reverse voltages (Vu, Vx) applied to antiparallel-connected thyristors (3U, 3X) in the TSC. The antiparallel-connected thyristors (3U, 3X) comprise a plurality of series-connected forward thyris­tors (3U) and a plurality of series-connected reverse thyristors (3X). The gate pulse generator monitors the forward and reverse voltages (Vu, Vx) and determines whether a period (2 ms) in which both the forward and reverse voltages (Vu, Vx) are zero continues for a pre­determined period (2 ms) while reverse-phase sides (3X) of the antiparallel-connected thyristors (3U, 3X) are held in conduction periods (t30 - t40), respectively. The gate pulse generator prolongs an active period (t20 - t31) of a forward conduction period signal (PHSu) by the predetermined period (2 ms). Upon switching (t30) from in-phase conduction to revese-phase conduction, even if some of the plurality of series-connected thyri­stors (3U) are turned off, these thyristors are turned on again within the predetermined period (3U), and an overvoltage is not applied to these thyristors.