An interface architecture for interconnecting a plurality of video display devices together over a high speed digital communication link having limited bandwidth provides at each node for transmitting during a "transmit mode"; 1) sequential pixels of digital data (COMVIDOUT) comprising separate luminance and chrominance fields, from a digital TV source associated with each display node which data re­presents a scaled video window, 2) the local system clock (SCLK), 3) vertical and horizontal communication sync signals (COMVSOUT and COMSHOUT), 4) luminance and chrominance clock enable signals (COMVOCE and COMCOCE) based on a scaling algorithm utilized in the trans­mitting video device to insure that both the proper pixels and the proper luminance and chrominance fields associated with these pixels are selected by the communications device for transmission. Further, the interface architecture at each display node provides for receiving during a "receive mode", 5) video input data pixels (COMVDIN), 6) a video input data clock enable signal from the communications adapter (COMVINCE) which controls the storage of the received video data window in the local frame buffer, 7) horizontal and vertical video input sync signals from the communicat­ions adapter (COMHSIN and COMVSIN) for properly synchronizing the storing of the received video input data from the communications adapter into the frame buffer beginning at a predetermined address therein. Means are also provided for accessing and transmitting audio data related to the video display data inter­spersed on the network with succesive lines of video pixel data. The system utilizes, to a great extent, existing hardware in conventional video display device architectures and associated communications adapters such that a versatile generally applicable transmission system is achievable requiring a minimum of additional control hardware and software.