The number of circuit path crossover points on boards (10) mounting plural connected multichip modules (5 to 8) is substantially reduced over the number that would otherwise be required. For 4-sided modules and boards, the modules are arranged on the board in such a way that their inter-connecting north-east-south-west ports are successively reordered to N-S-E-W. Additionally, further advantage in reducing crossover vias may be gained by combining the reordering with a phased rotation of the modules from their nominal congruent board position. For the 4-sided module, these expedients virtually eliminate crossover vias between the east and west ports. It also provides for all multi-chip modules a ready common bus structure (66,69) located at a common interior area of the mounting board, to which the E and W-ports are oriented. The invention is applicable to a class of multi-sided, multi-chip modules on boards with alike number of sides.