发明公开
EP0499985A2 Manufacturing method of semiconductor memory device
失效
Verfahren zum Herstellen einer Halbleiterspeicheranordnung。
- 专利标题: Manufacturing method of semiconductor memory device
- 专利标题(中): Verfahren zum Herstellen einer Halbleiterspeicheranordnung。
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申请号: EP92102522.7申请日: 1992-02-14
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公开(公告)号: EP0499985A2公开(公告)日: 1992-08-26
- 发明人: Saeki, Yukihiro, c/o Intellectual Property Div. , Matsumoto, Osamu, c/o Intellectual Property Div. , Yoshida, Masayuki, c/o Intellectual Property Div. , Mizutani, Takahide, c/o Intellectual Property Div. , Chida, Nobuyoshi, c/o Intellectual Property Div. , Shigematsu, Tomohisa, c/o Intellectual Prop. Div. , Uemura, Teruo, c/o Intellectual Property Div. , Toyoda, Kenji, c/o Intellectual Property Div. , Takamura, Hiroyuki, c/o Intellectual Property Div.
- 申请人: KABUSHIKI KAISHA TOSHIBA , TOSHIBA MICRO-ELECTRONICS CORPORATION
- 申请人地址: 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210 JP
- 专利权人: KABUSHIKI KAISHA TOSHIBA,TOSHIBA MICRO-ELECTRONICS CORPORATION
- 当前专利权人: KABUSHIKI KAISHA TOSHIBA,TOSHIBA MICRO-ELECTRONICS CORPORATION
- 当前专利权人地址: 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210 JP
- 代理机构: Lehn, Werner, Dipl.-Ing.
- 优先权: JP108963/91 19910218
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/82
摘要:
A manufacturing method of a semiconductor memory device includes the steps of selectively forming a field oxide film (22) and a gate oxide film (21) on a semiconductor substrate (20), depositing a first conductive layer (23) on an entire surface of the resultant structure, selectively etching the first conductive layer (23) located in a region other than an element region, oxidation of the entire surface of the resultant structure, depositing a second conductive layer (27) on an entire surface of the resultant structure, and etching the first conductive layer (23), the oxide film (26), and the second conductive layer (27) using the same mask to form a plurality of floating gates by the first conductive layer (23) and to form a plurality of control gates by the second conductive layer (27), wherein the step of selectively etching the first conductive layer (23) includes the first etching step of forming cell slits (24) for separating the plurality of floating gates from each other and the second etching step of forming removed regions (25) each of which includes only one end of each of the plurality of control gates.
公开/授权文献
- EP0499985B1 Manufacturing method of semiconductor memory device 公开/授权日:1999-06-02
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