Invention Publication
- Patent Title: A phase locked loop circuit
- Patent Title (中): 锁相环电路
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Application No.: EP93117197.9Application Date: 1990-08-24
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Publication No.: EP0583804A1Publication Date: 1994-02-23
- Inventor: Saeki, Hiroshi, Anritsu Okihara-Ryou , Motoyama, Hatsuo
- Applicant: ANRITSU CORPORATION
- Applicant Address: 5-10-27, Minamiazabu Minato-ku Tokyo JP
- Assignee: ANRITSU CORPORATION
- Current Assignee: ANRITSU CORPORATION
- Current Assignee Address: 5-10-27, Minamiazabu Minato-ku Tokyo JP
- Agency: Sajda, Wolf E., Dipl.-Phys.
- Priority: JP217261/89 19890825; JP243434/89 19890921; JP246532/89 19890925; JP83049/90 19900330
- Main IPC: H03L7/093
- IPC: H03L7/093 ; H03L7/113 ; H03B21/01
Abstract:
A phase locked loop circuit is provided comprising a voltage controlled oscillator (221) capable of outputting a variable oscillation frequency signal. A phase detector (222) compares the output signal of the voltage control oscillator (221) with a reference signal and outputs an error signal. An integrator (223) integrates the error signal and extracts a direct current variable component which is fed by a loop filter (224) from the integrator (223) to the voltage controlled oscillator (221) as a control signal. An alternate current coupling circuit (230) is provided for adding only an alternate current component contained in the output error signal to the control signal for feeding same to the voltage controlled oscillator (221). A compensating circuit (231) is inserted in the signal path of the alternate current coupling circuit (230), the compensating circuit (231) having a cut-off frequency exceeding the cut-off frequency of the integrator (223).
Public/Granted literature
- EP0583804B1 A phase locked loop circuit Public/Granted day:1997-07-23
Information query
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