发明公开
- 专利标题: Vertical synchronizing signal stabilizing circuit, integrated circuit and television signal processing device
- 专利标题(中): 垂直同步信号稳定电路,集成电路和电视信号处理装置
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申请号: EP96306295.5申请日: 1996-08-30
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公开(公告)号: EP0760582A3公开(公告)日: 1999-01-20
- 发明人: Iwasaki, Nobutaka, c/o Sony Kokubu Semicond Corp , Numata, Hiroshi, c/o Sony Corporation
- 申请人: SONY CORPORATION
- 申请人地址: 7-35, Kitashinagawa 6-chome Shinagawa-ku Tokyo JP
- 专利权人: SONY CORPORATION
- 当前专利权人: SONY CORPORATION
- 当前专利权人地址: 7-35, Kitashinagawa 6-chome Shinagawa-ku Tokyo JP
- 代理机构: Ayers, Martyn Lewis Stanley
- 优先权: JP246615/95 19950830
- 主分类号: H04N5/08
- IPC分类号: H04N5/08
摘要:
In a vertical synchronizing signal stabilizing circuit, an integrated circuit and a television signal processing device, a vertical synchronizing signal of which period is stabilized can be output with a small number of elements and a simple constitution, without being influenced by the state of the television signal. On the basis of a first distinguish signal which indicates whether there is a separated signal separated from the television signal as the vertical synchronizing signal or not and of a second distinguish signal which indicates whether the period of the separated signal is the standard period or not, the plural states of the separated signal are discriminated, and the processing mode of the separated signal processing means is switched on the basis of the result of the discrimination to process the separated signal.
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