A bus controlled pulse modulator receives a digitally coded signal (103) and generates a pulse-width modulated signal. The pulse-width modulated signal is coupled to a base electrode of a non-committed or open collector transistor (Q3). The transistor switches with a controlled duty cycle. The collector of the transistor is coupled to an inverting input terminal of an amplifier (U1) via a resistor (R9). The amplifier produces a compensation current in a tilt compensation coil (W1). The voltage (V3) at the inverting input terminal is maintained constant in closed loop operation. The constant voltage produces a magnitude of a collector current (i1) in the transistor that is unaffected by the duty cycle of the pulse-width modulated signal. The compensation current thereby varies linearly with the duty cycle.