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公开(公告)号：EP0979000A2
公开(公告)日：2000-02-09
申请号：EP99115011.1
申请日：1999-07-30
发明人： Wilber, James Albert
IPC分类号： H04N5/12
摘要： A video display apparatus for pictures from broadcast sources having standard or high definition, which may also display computer generated images. To display this range of sources a horizontal frequency signal generator is selectably operable at a plurality of frequencies. The generator comprises an oscillator (300) controlled for synchronized oscillation at a plurality of horizontal frequencies. A source (SW15) of synchronizing pulses (5) is coupled to an input of a phase detector (50) which has another input coupled to the oscillator (300/400). The phase detector (50) generates an output signal (11) representative of a phase difference between the inputs. A processor (200) is coupled to the phase detector (50) for processing the output signal (11) and generating a control signal (201) for controlling the oscillator (300/400). The processor (200) gain is controlled responsive to selected ones of the plurality of frequencies.
摘要翻译： 用于具有标准或高清晰度的广播源的图像的视频显示装置，其还可以显示计算机生成的图像。 为了显示该范围的源，水平频率信号发生器可选择地以多个频率工作。 发生器包括被控制为在多个水平频率下同步振荡的振荡器（300）。 同步脉冲（5）的源极（SW15）耦合到具有耦合到振荡器（300/400）的另一个输入的相位检测器（50）的输入端。 相位检测器（50）产生表示输入之间的相位差的输出信号（11）。 处理器（200）耦合到相位检测器（50），用于处理输出信号（11）并产生用于控制振荡器（300/400）的控制信号（201）。 所述处理器（200）增益是响应于所述多个频率中的所选频率而被控制的。
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3.发明公开Video display apparatus comprising a bus controlled compensation circuit using a PWM control signal 失效使用脉冲宽度调制信号通过总线控制的补偿电路的图像显示装置
公开(公告)号：EP0817506A3
公开(公告)日：1999-04-14
申请号：EP97110082.1
申请日：1997-06-20
IPC分类号： H04N9/29
CPC分类号： H04N9/29
摘要： A bus controlled pulse modulator receives a digitally coded signal (103) and generates a pulse-width modulated signal. The pulse-width modulated signal is coupled to a base electrode of a non-committed or open collector transistor (Q3). The transistor switches with a controlled duty cycle. The collector of the transistor is coupled to an inverting input terminal of an amplifier (U1) via a resistor (R9). The amplifier produces a compensation current in a tilt compensation coil (W1). The voltage (V3) at the inverting input terminal is maintained constant in closed loop operation. The constant voltage produces a magnitude of a collector current (i1) in the transistor that is unaffected by the duty cycle of the pulse-width modulated signal. The compensation current thereby varies linearly with the duty cycle.
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4.发明公开Arrangement for producing a composite synchronisation signal 失效Vorrichtung zum Herstellen eines zusammengesetzten Synchronisationssignals
公开(公告)号：EP0817473A2
公开(公告)日：1998-01-07
申请号：EP97110232.2
申请日：1997-06-23
发明人： Wilber, James Albert
IPC分类号： H04N5/06
CPC分类号： H04N5/06
摘要： An arrangement for reproducing a composite blanking or sync signal (COMPOSY) includes a vertical deflection circuit (11) having a supply boost stage (11f). A first pulse voltage (VBST) at a vertical rate is derived from an output signal of the boost stage. The vertical rate, first pulse voltage is coupled to a base terminal of an emitter follower (Q1) via a voltage divider for producing a leading edge of an output pulse voltage (VBLANK) of the emitter follower. The vertical rate first pulse voltage is also coupled via an R-C network (C1, R6) to a regenerative switch (Q2, Q3). The regenerative switch is coupled to the base terminal of the emitter follower for producing a trailing edge (TEVBLANK) of the output pulse voltage of the emitter follower. The trailing edge is produced after a predetermined interval (TW) has elapsed from the leading edge. The output pulse voltage of the emitter follower is combined with a horizontal rate pulse voltage (HBLANK) for producing the composite sync signal. The composite sync signal is coupled to a field detector (120b) of a picture-in-picture processor (120) of a video display.
摘要翻译： 用于再现复合消隐或同步信号（COMPOSY）的装置包括具有供电增压级（11f）的垂直偏转电路（11）。 从升压级的输出信号导出垂直速率的第一脉冲电压（VBST）。 垂直速率的第一脉冲电压经由分压器耦合到射极跟随器（Q1）的基极端子，用于产生射极跟随器的输出脉冲电压（VBLANK）的前沿。 垂直速率第一脉冲电压也通过R-C网络（C1，R6）耦合到再生开关（Q2，Q3）。 再生开关耦合到射极跟随器的基极，以产生射极跟随器的输出脉冲电压的后沿（TEVBLANK）。 在从前缘经过预定间隔（TW）之后产生后缘。 射极跟随器的输出脉冲电压与水平速率脉冲电压（HBLANK）组合，用于产生复合同步信号。 复合同步信号耦合到视频显示器的画中画处理器（120）的场检测器（120b）。
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公开(公告)号：EP0578142A3
公开(公告)日：1994-08-10
申请号：EP93110559.7
申请日：1993-07-02
发明人： Wilber, James Albert
IPC分类号： H04N3/22
摘要： A first voltage-to-current converter (Q07,U06A) responsive to a picture height adjustment control signal (V-SIZE) generates a first current (IURAMP) in a capacitor (C03) for producing a trace portion of a sawtooth signal (VSAW) in the capacitor having a rate of change that is adjustable in accordance with an adjustment of the control signal. A second voltage-to-current converter (Q09,U02A) responsive to the control signal generates a second current (I0) in a resistor (R09) for producing a third signal (base voltage of U01C) that is adjustable in accordance with the control signal. The sawtooth and third signals are coupled via a differential amplifier (U01B,U01C) to a vertical deflection winding (Ly,Fig. 1c) to produce a vertical deflection current (iy) in accordance with a difference between the sawtooth and third signals such that picture height adjustment does not affect vertical centering.
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6.发明授权
公开(公告)号：EP0798855B1
公开(公告)日：2005-05-25
申请号：EP97104470.6
申请日：1997-03-15
发明人： Wilber, James Albert
IPC分类号： H03K4/502
CPC分类号： H03K4/502
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公开(公告)号：EP0642263A1
公开(公告)日：1995-03-08
申请号：EP94113181.5
申请日：1994-08-24
发明人： Wilber, James Albert
摘要： A differential amplifier formed by a pair of transistors (U01C, U01B) couples a vertical sawtooth signal (VRAMP1) to an input side of a vertical deflection amplifier. Nonlinearity of the transistor pair provides S-correction in the vertical direction. The current in the transistor pair varies when vertical height is adjusted, in service operation, so that the nonlinearity changes. In a vertical shrink mode of operation, the amplitude of the sawtooth signal is reduced. The nonlinearity (ratio of VRAMP1/VSAW) associated with a given level of the sawtooth signal that corresponds to a given vertical position in the vertical shrink mode is the same as that associated with the same level of the sawtooth signal in the vertical, non-shrink mode.
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9.发明公开Vertical deflection arrangement for zoom pan features 失效VertikalablenkungsvorrichtungfürZoom- undNachführungsfunktion。
公开(公告)号：EP0578141A2
公开(公告)日：1994-01-12
申请号：EP93110558.9
申请日：1993-07-02
CPC分类号： H04N7/0122 , H04N3/22 , H04N3/27
摘要： A vertical synchronization signal (SYNC, Fig. 2c) is delayed by a selectable amount (TD, Fig. 2e) to produce a delayed vertical synchronization signal (VRESET, Fig. 2c). The delayed signal causes a beginning of a trace portion of a vertical deflection current (iy, Fig. 3a) to be delayed relative to a video signal (SNTSC, Fig. 3d). The delayed beginning time provides a top panning feature. Synchronization information for the vertical deflection current is obtained from the delayed synchronization signal on a field-by-field basis. The video signal contains a field (301, Fig. 3d) that provides picture information presently displayed on a screen of a cathode ray tube. The synchronization information (VRESET, Fig. 2c) is derived from a vertical synchronization pulse (SYNC, Fig. 3d) of the undelayed vertical synchronization signal that occurs immediately prior to the field and that is associated with the field.
摘要翻译： 垂直同步信号（SYNC，图2c）被延迟可选量（TD，图2e）以产生延迟垂直同步信号（图2c）。 延迟信号导致垂直偏转电流（iy，图3a）的迹线部分的开始相对于视频信号（SNTSC，图3d）延迟。 延迟开始时间提供了顶级平移功能。 从延迟同步信号逐场获得垂直偏转电流的同步信息。 视频信号包含提供当前显示在阴极射线管的屏幕上的图像信息的场（301，图3d）。 同步信息（VRESET，图2c）从立即在场之前发生并与场相关联的未延迟的垂直同步信号的垂直同步脉冲（SYNC，图3d）导出。
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公开(公告)号：EP0549959A1
公开(公告)日：1993-07-07
申请号：EP92121422.7
申请日：1992-12-17
摘要： Retrace pulses (F) are integrated by an R-C network (R1, C3) to produce a ramp signal (S). The resistive member of the R-C network is bypassed by a diode (CR3) to provide rapid retrace at the conclusion of the ramp portion of the integrated signal. A voltage divider (R3, R4) at the output of the integrator adjusts the DC level of the ramp signal (S) without affecting the constant of integration of the R-C network.
摘要翻译： 回扫脉冲（F）由R-C网络（R1，C3）积分以产生斜坡信号（S）。 R-C网络的电阻元件由二极管（CR3）旁路，以便在积分信号的斜坡部分结束时提供快速回扫。 积分器输出端的分压器（R3，R4）调整斜坡信号（S）的直流电平，而不影响R-C网络的集成常数。
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