发明公开
EP0843853A1 MICROPROZESSORSYSTEM FÜR SICHERHEITSKRITISCHE REGELUNGEN 无效
微处理器系统安全关键系统

MICROPROZESSORSYSTEM FÜR SICHERHEITSKRITISCHE REGELUNGEN
摘要:
A microprocessor system for safety-critical regulating systems comprises two synchronously operated central units (1, 2) which receive the same input data and process the same program, ROM (5, 10) and RAM (6, 11) for useful data and verification data and also comparators (18, 19) which check the output signals from the central units (1, 2) and issue shutdown signals if they do not correspond. The central units (1, 2) are connected to the memories and the input/output units via separate bus systems (3, 4) and are coupled by driver stages (15-17) which make it possible for the central units (1, 2) to read and process the data available in both bus systems (3, 4).
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