摘要:
Proposed is a microprocessor arrangement for a vehicle control system with a plurality of microprocessor systems that are linked by a bus system and that carry out at least an anti-lock braking (ABS) and automatic slip control (ASR) as well as at least one other high-computation control function, such as yaw moment control (GMR), and monitoring functions. The microprocessor arrangement comprises three microprocessor systems (1, 2, 3; MP1, MP2, MP3) to which the individual functions are allocated such that the first microprocessor system (1, MP1) together with the second microprocessor system (2, MP2) perform the ABS and ASR functions, including monitoring of these functions, and the third microprocessor system (3, MP3) together with the second microprocessor system (2, MP2) execute the other control function (GMR) and its monitoring.
摘要:
A microprocessor system for safety-critical regulating systems comprises two synchronously operated central units (1, 2) which receive the same input data and process the same program, ROM (5, 10) and RAM (6, 11) for useful data and verification data and also comparators (18, 19) which check the output signals from the central units (1, 2) and issue shutdown signals if they do not correspond. The central units (1, 2) are connected to the memories and the input/output units via separate bus systems (3, 4) and are coupled by driver stages (15-17) which make it possible for the central units (1, 2) to read and process the data available in both bus systems (3, 4).
摘要:
The proposed circuit for safety-critical control system, such as ABS brake systems, is based at least in part on redundancy in the system of processing the input data used to produce the control signals. A discrepancy between signals causes the control system to cut out. A microprocessor system is provided for the data processing. It comprises two or more CPUs (1, 2) which carry out parallel processing of the input data. The output data from the CPUS are checked for inconsistencies. A generator (12) which produces check information is assigned to each of the write- and read memories (11) in the microprocessor. The write- and read memories (11) and the permanent memory (7) are expanded by means of memory locations (8, 13) for the check information. Whenever data are written to or read from the memories, the contents of the memory location (8, 13) are correlated with the associated check information and an error detection signal is produced where there is a dicrepancy or absence of 'plausibility'.
摘要:
Un montage pour un véhicule comportant une régulation électronique du dispositif d'antiblocage comporte des circuits ayant pour fonction d'assurer une régulation individuelle des variations de la pression de freinage dans les freins des roues d'un essieu de véhicule et de limiter le couple d'embardée résultant de différences dans la pression de freinage. Il est prévu également des circuits (6) qui détectent, pour chaque roue, les signaux de chute de pression (PA1, PA2) et déterminent sur cette base la différence de pression (DA12). Pour différents coefficients de frottement (dissociation des valeurs de mu) on fait varier le gradient moyen d'élévation de pression au niveau de la roue supportant la pression la plus élevée en fonction de la différence de pression (DA12) et de la décélération du véhicule. A l'instant de l'apparition de la pointe de couple d'embardée, c'est-à-dire immédiatement avant le retour de la roue supportant la pression la plus faible dans la zone stable, la pression de freinage au niveau de la roue supportant la pression la plus élevée est réduite d'une valeur dépendant de la décélération du véhicule et de la différence de pression.
摘要:
The proposed circuit for safety-critical control system, such as ABS brake systems, is based at least in part on redundancy in the system of processing the input data used to produce the control signals. A discrepancy between signals causes the control system to cut out. A microprocessor system is provided for the data processing. It comprises two or more CPUs (1, 2) which carry out parallel processing of the input data. The output data from the CPUS are checked for inconsistencies. A generator (12) which produces check information is assigned to each of the write- and read memories (11) in the microprocessor. The write- and read memories (11) and the permanent memory (7) are expanded by means of memory locations (8, 13) for the check information. Whenever data are written to or read from the memories, the contents of the memory location (8, 13) are correlated with the associated check information and an error detection signal is produced where there is a dicrepancy or absence of 'plausibility'.
摘要:
A circuit arrangement for a vehicle with electronic anti-lock regulation has circuits for the individual regulation of the braking pressure cycle in the wheel brakes on a vehicle axle and to limit the yawing moment resulting from differences in braking pressure. In addition there are circuits (6) which detect the pressure reduction signals (PA1, PA2) individually and determine the pressure difference DA12) therefrom. With different frictional values (ν-split), the average pressure release gradient on the high-pressure wheel is varied dependently upon the pressure difference (DA12) and the vehicle deceleration. At the moment when the 'yawing moment peak' occurs, i.e. immediately before the low-pressure wheel returns to the stable region, the braking pressure at the high wheel is reduced by a value depending on the vehicle deceleration and the pressure difference.