A switching system comprising a switching structure (1130) for routing cells from a set of M input ports towards a set of M output ports. The systems further includes a set of distributed individual Switch Core Access Layer elements (S.C.A.L.) (1000) which communicating with one input and output port of the switching structure by means of a set of serial communication links (1400, 1600). Each SCAL element provides attachment to at least one Protocol Adapter (Protocol Engine 1600- 1900), and comprises a set of circuits (PINT 511-515; 611-614), each PINT circuit being associated with a corresponding one of said at least Protocol Adapter (Protocol Engine 1600-1900). The receive part of each circuit receives the data cells from the attached Protocol Adapter (Protocol Engine 1600) and includes at least one first FIFO storage (701-704) for storing the cells being received. Additionaly, there is introduced at least one extra byte to every cell, which at least one extra byte is reserved for a routing header dedicated for controlling either the routing process within the switching structure. Each transmit part of the destination PINT circuit comprises at least one second FIFO storage (801-802) having a substantially greater capacity than said of said first FIFO storage. Every Transmit part receives all the cells that are generated at the corresponding output port but uses the at least one extrabyte for determining whether or not the cell is to be entered into the at least second FIFO contained in a considered PINT circuit. Additionaly, each distributed individual SCAL element comprises control means for performing Time Division Multiplexing (TDM) access of the at least one first FIFO and second FIFO so that the high rate communication between the switching structure and SCALs can be distributed between the different Protocol Adapters. A set of serializer/deserializer permit the use of cheap serialized communication links between the centralized switching system and the different SCAL elements.