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    Switching system comprising distributed elements allowing attachment to lines adapters
    1.
    发明公开
    Switching system comprising distributed elements allowing attachment to lines adapters 失效
    包括分布式元件的交换系统，允许连接到线路适配器

    公开(公告)号：EP0849916A2

    公开(公告)日：1998-06-24

    申请号：EP97480051.8

    申请日：1997-08-19

    申请人： International Business Machines Corporation

    发明人： Blanc, Alain ,  Saurel, Alain ,  Brezzo, Bernard ,  Poret, Michel

    IPC分类号： H04L12/56

    CPC分类号： H04L49/3081 ,  H04L49/1553 ,  H04L2012/5642 ,  H04Q11/0478

    摘要： A switching system comprising a switching structure (1130) for routing cells from a set of M input ports towards a set of M output ports. The systems further includes a set of distributed individual Switch Core Access Layer elements (S.C.A.L.) (1000) which communicating with one input and output port of the switching structure by means of a set of serial communication links (1400, 1600). Each SCAL element provides attachment to at least one Protocol Adapter (Protocol Engine 1600- 1900), and comprises a set of circuits (PINT 511-515; 611-614), each PINT circuit being associated with a corresponding one of said at least Protocol Adapter (Protocol Engine 1600-1900). The receive part of each circuit receives the data cells from the attached Protocol Adapter (Protocol Engine 1600) and includes at least one first FIFO storage (701-704) for storing the cells being received. Additionaly, there is introduced at least one extra byte to every cell, which at least one extra byte is reserved for a routing header dedicated for controlling either the routing process within the switching structure. Each transmit part of the destination PINT circuit comprises at least one second FIFO storage (801-802) having a substantially greater capacity than said of said first FIFO storage. Every Transmit part receives all the cells that are generated at the corresponding output port but uses the at least one extrabyte for determining whether or not the cell is to be entered into the at least second FIFO contained in a considered PINT circuit. Additionaly, each distributed individual SCAL element comprises control means for performing Time Division Multiplexing (TDM) access of the at least one first FIFO and second FIFO so that the high rate communication between the switching structure and SCALs can be distributed between the different Protocol Adapters. A set of serializer/deserializer permit the use of cheap serialized communication links between the centralized switching system and the different SCAL elements.

    摘要翻译： 一种交换系统，包括用于将来自一组M个输入端口的信元路由到一组M个输出端口的交换结构（1130）。 这些系统还包括一组分布式的单独交换机核心接入层单元（S.C.A.L.）（1000），它借助一组串行通信链路（1400,1600）与交换结构的一个输入和输出端口进行通信。 每个SCAL元件提供对至少一个协议适配器（协议引擎1600-1900）的附接，并且包括一组电路（PINT 511-515; 611-614），每个PINT电路与所述至少一个协议 适配器（协议引擎1600-1900）。 每个电路的接收部分从附加的协议适配器（协议引擎1600）接收数据信元并且包括至少一个用于存储正在接收的信元的第一FIFO存储器（701-704）。 另外，每个单元至少引入一个额外字节，其中至少一个额外字节被保留用于专用于控制交换结构内的路由过程的路由头。 目的地PINT电路的每个发送部分包括具有比所述第一FIFO存储器的容量大得多的容量的至少一个第二FIFO存储器（801-802）。 每个发送部分接收在相应的输出端口产生的所有单元，但是使用至少一个额外字节来确定单元是否被输入到包含在所考虑的PINT电路中的至少第二FIFO中。 另外，每个分布式单独的SCAL单元包括用于执行至少一个第一FIFO和第二FIFO的时分复用（TDM）接入的控制装置，使得交换结构和SCAL之间的高速通信可以在不同的协议适配器之间分配。 一组串行器/解串器允许在集中式交换系统和不同的SCAL单元之间使用便宜的串行通信链路。

    Process and system of flow control for a switching system
    2.
    发明公开
    Process and system of flow control for a switching system 审中-公开
    Verfahren und System zur Flusssteuerung im Vermittlungssystem

    公开(公告)号：EP0938212A1

    公开(公告)日：1999-08-25

    申请号：EP98480073.0

    申请日：1998-10-29

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Blanc, Alain ,  Brezzo, Bernard ,  Debord, Pierre ,  Saurel, Alain

    IPC分类号： H04L12/56 ,  H04Q11/04

    CPC分类号： H04L49/3081 ,  H04L49/1507 ,  H04L49/201 ,  H04L49/25 ,  H04L49/50 ,  H04L49/506 ,  H04L2012/563 ,  H04L2012/5672 ,  H04Q11/0478

    摘要： A flow control process for a switching system comprising at least one switch core (1130) connected through serial communication links (1400,4400) to remote and distributed Protocol Adapters or Protocol Engine through Switch Core Access Layer (SCAL) elements (1000). For each input port i, the SCAL element (1000) comprises a receive Protocol Interface (PINT,511) for the handling of the particular protocol corresponding to the adapter being assigned the input port i and first serializing means (1160) for providing the attachment to the switch core by means of first serial communication link(s) (1400). When the cells are received in the switch core, they are deserialized by means of first deserializing means (1170). At each output port, the cells are serialized again by means of second serializing means (1190) and then transmitted via second serial communication link, such as a coax cable or optical fiber, to the appropriate SCAL. For this purpose, the latter comprises second deserializing means deserializing means (1180) and a transmit Protocol Interface (PINT) circuit for permitting the attachment of the Protocol Adapter. The flow control process permits two flow control signals, a first Flow Control Receive (FCR) from the core to the SCAL, and a second Flow Control Transmit (FCX) from the SCAL back to the core, to be transmitted without any additional wiring or circuitry by using the normal direction of the data flow.

    摘要翻译： 一种用于交换系统的流控制过程，其包括通过串行通信链路（1400,4400）连接到远程和分布式协议适配器或通过交换机核心接入层（SCAL）元件（1000）的协议引擎的至少一个交换机核心（1130）。 对于每个输入端口i，SCAL元件（1000）包括用于处理与分配给输入端口i的适配器相对应的特定协议的接收协议接口（PINT，511）和用于提供附件的第一串行化装置（1160） 通过第一串行通信链路（1400）到交换机核心。 当单元被接收在开关核心中时，它们通过第一反串行装置（1170）被反串行化。 在每个输出端口，通过第二串行化装置（1190）再次串行化单元，然后经由诸如同轴电缆或光纤的第二串行通信链路发送到适当的SCAL。 为此，后者包括用于允许协议适配器的附接的反序列化装置（1180）和传输协议接口（PINT）电路的第二反序列化装置。 流量控制过程允许两个流量控制信号，从核心到SCAL的第一流控制接收（FCR）和从SCAL返回到核心的第二流控制发送（FCX），以便不需要任何附加布线或 通过使用数据流的法线方向进行电路。

    Switching system comprising distributed elements allowing attachment to lines adapters
    3.
    发明公开
    Switching system comprising distributed elements allowing attachment to lines adapters 失效
    包括用于线路适配器的连接切换的系统，所述分布式元件

    公开(公告)号：EP0849916A3

    公开(公告)日：1998-12-16

    申请号：EP97480051.8

    申请日：1997-08-19

    申请人： International Business Machines Corporation

    发明人： Blanc, Alain ,  Saurel, Alain ,  Brezzo, Bernard ,  Poret, Michel

    IPC分类号： H04L12/56

    CPC分类号： H04L49/3081 ,  H04L49/1553 ,  H04L2012/5642 ,  H04Q11/0478

    摘要： A switching system comprising a switching structure (1130) for routing cells from a set of M input ports towards a set of M output ports. The systems further includes a set of distributed individual Switch Core Access Layer elements (S.C.A.L.) (1000) which communicating with one input and output port of the switching structure by means of a set of serial communication links (1400, 1600). Each SCAL element provides attachment to at least one Protocol Adapter (Protocol Engine 1600- 1900), and comprises a set of circuits (PINT 511-515; 611-614), each PINT circuit being associated with a corresponding one of said at least Protocol Adapter (Protocol Engine 1600-1900). The receive part of each circuit receives the data cells from the attached Protocol Adapter (Protocol Engine 1600) and includes at least one first FIFO storage (701-704) for storing the cells being received. Additionaly, there is introduced at least one extra byte to every cell, which at least one extra byte is reserved for a routing header dedicated for controlling either the routing process within the switching structure. Each transmit part of the destination PINT circuit comprises at least one second FIFO storage (801-802) having a substantially greater capacity than said of said first FIFO storage. Every Transmit part receives all the cells that are generated at the corresponding output port but uses the at least one extrabyte for determining whether or not the cell is to be entered into the at least second FIFO contained in a considered PINT circuit. Additionaly, each distributed individual SCAL element comprises control means for performing Time Division Multiplexing (TDM) access of the at least one first FIFO and second FIFO so that the high rate communication between the switching structure and SCALs can be distributed between the different Protocol Adapters. A set of serializer/deserializer permit the use of cheap serialized communication links between the centralized switching system and the different SCAL elements.

    Switching system comprising a mask mechanism for altering the internal routing process
    5.
    发明公开
    Switching system comprising a mask mechanism for altering the internal routing process 失效
    Vermittlungssystem mit einem Maskiermechanismus zurÄnderungdes internen Leitweglenkungsprozesses

    公开(公告)号：EP0961443A1

    公开(公告)日：1999-12-01

    申请号：EP98480041.7

    申请日：1998-05-29

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Blanc, Alain ,  Brezzo, Bernard ,  Saurel, Alain

    IPC分类号： H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/108 ,  H04L49/153 ,  H04L49/256 ,  H04L49/309 ,  H04L2012/5627 ,  H04L2012/5681

    摘要： A Switching system (15 or 25) receiving data cells from a set of n input ports and to be routed to one or more output ports in accordance with the contents of a bitmap value introduced in the cell at the entrance of said module, said module comprising a shared buffer for storing the cells which are to be routed. The systems further comprises a mask mechanism with a mask register for altering the value of the bitmap before it is used for controlling the routing process for either transporting the considered cell to the output port or discarding the latter. Two switching systems are combined in a first and a second Switch Fabrics (10, 20) in order to respectively form a first and second switch cores, located in a centralized building and a set of Switch Core Access Layer (S.C.A.L.) elements distributed in different physical areas. Each SCAL element respectively comprises a SCAL Receive element (11-i) and a SCAL Xmit element (12-i) for respectively permitting access to a corresponding input and output port of one of said switching system. A set of Port Adapters (30; 31) are distributed at different physical areas and are connected to said first and second Switch Fabrics via a particular SCAL element so that each Switching system (15, 25) receives the sequence of cells coming from any Port adapter and conversely any Port adapter may receive data from any one of said first or second switch cores. The mask achieves the distribution of the first and second switching systems between the different attached Port adapters, thus providing a load balancing between the two switching systems permitting to associate their individual buffering resources.

    摘要翻译： 1.一种从一组n个输入端口接收数据单元并根据在所述模块入口处的单元中引入的位图值的内容被路由到一个或多个输出端口的交换系统（15或25），所述模块 包括用于存储要路由的单元的共享缓冲器。 系统还包括具有掩模寄存器的掩模机构，用于在将位图的值用于控制用于将所考虑的单元传送到输出端口或丢弃该位图之前的路由处理。 两个交换系统组合在第一和第二交换结构（10,20）中，以便分别形成位于集中式建筑物中的第一和第二交换机核心，以及分布在不同网络中的一组交换机核心接入层（SCAL） 物理区域。 每个SCAL元件分别包括用于分别允许访问所述交换系统之一的相应输入和输出端口的SCAL接收元件（11-i）和SCAL Xmit元件（12-i）。 一组端口适配器（30; 31）分布在不同的物理区域，并且通过特定的SCAL元件连接到所述第一和第二交换结构，使得每个交换系统（15,25）接收来自任何端口的单元序列 适配器，并且相反地，任何端口适配器可以从所述第一或第二交换机核心中的任何一个接收数据。 掩模实现了在不同的附接端口适配器之间的第一和第二交换系统的分布，从而在允许关联其各自的缓冲资源的两个交换系统之间提供负载平衡。

    Switching architecture comprising two switch fabrics
    8.
    发明公开
    Switching architecture comprising two switch fabrics 失效
    Vermittlungsarchitektur mit zwei Koppelfelden

    公开(公告)号：EP0961442A1

    公开(公告)日：1999-12-01

    申请号：EP98480039.1

    申请日：1998-05-29

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Blanc, Alain ,  Brezzo, Bernard ,  Robbe, Jean-Claude ,  Gohl, Sylvie ,  Saurel, Alain

    IPC分类号： H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/108 ,  H04L49/309 ,  H04L49/455 ,  H04L2012/5627 ,  H04L2012/5647

    摘要： A Switching architecture comprising a first and a second Switch Fabrics (10, 20) including a switch core (15, 25) located in a centralized building and a set of SCAL elements distributed in different physical areas. Each SCAL element respectively comprises a SCAL Receive element (11-i) and a SCAL Xmit element (12-i) for respectively permitting access to a corresponding input and output port of the switch core. The Port Adapters (30; 31) are distributed at different physical areas and each one is connected to the first and second Switch Fabric via a particular SCAL element so that each Switch core (15, 25) receives the sequence of cells coming from any Port adapter and conversely any Port adapter may receive data from any one of said first or second switch core. There are arranged means (15, 100) for assigning a particular Switch core to any Port adapter for the normal traffic of cells and for reserving the other switch core to Backup or maintenance traffic situations. To achieve this each switch core is fitted with a masking mechanism which uses the value loaded into a Mask register for altering the bitmap value which is normally used inside the switch core for controlling the routing process. Since the Mask registers in the two switch cores are loaded with complementary values, this permits a perfect distribution of the cells via one and only one SCAL Xmit element towards any Port Adapter. Preferably the Mask mechanism can be controlled by a special control field located into the cell, or when maintenance of backup conditions are planned.

    摘要翻译： 一种交换架构，包括第一和第二交换矩阵（10,20），其包括位于集中式建筑物中的交换核心（15,25）和分布在不同物理区域中的一组SCAL元件。 每个SCAL元件分别包括用于分别允许访问交换机核心的相应输入和输出端口的SCAL接收元件（11-i）和SCAL Xmit元件（12-i）。 端口适配器（30; 31）分布在不同的物理区域，并且每个通过特定的SCAL元件连接到第一和第二交换结构，使得每个交换机内核（15,25）接收来自任何端口的单元序列 适配器，并且相反，任何端口适配器可以从所述第一或第二交换机核心中的任何一个接收数据。 布置了用于将特定交换机核心分配给用于小区正常业务的任何端口适配器并用于将另一交换机核心保留到备份或维护业务情况的装置（15,100）。 为了实现这一点，每个交换机核心都配有一个掩蔽机制，该机制使用加载到掩码寄存器中的值来改变通常用于控制路由过程的交换机核心内的位图值。 由于两个交换机核心中的掩码寄存器都加载了互补值，因此允许通过一个且仅一个SCAL Xmit元素将单元格完美分配给任何端口适配器。 优选地，掩模机构可以由位于单元中的特定控制区域或者在计划备用条件的维护时进行控制。