发明公开
EP0854611A3 Network switch with multiple bus architecture 失效
网络交换网络与多个总线

Network switch with multiple bus architecture
摘要:
A network switch including one or more network ports for receiving and transmitting data, where each port includes a network interface, a data bus interface and a processor port interface. a data bus coupled to the data bus interface of each of the ports, a processor bus coupled to a processor and to the processor port interface of each of the ports, and a memory bus coupled to a memory. The network switch further includes a switch manager coupled to the data bus, the processor bus and the memory bus for controlling data flow between the ports and said memory and for enabling the processor access to the ports and the memory. In this manner, the processor has direct and relatively independent access to the network ports for performing overhead functions, such as monitoring, determining status and configuration without consuming valuable bandwidth of the data bus.
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