A current mirror circuit for mirroring current in CMOS integrated circuit technology includes a current mirror arrangement formed of first and second P-channel MOS transistors (MP32, MP33), a variable input current source (Ics), a first source follower transistor (MN34), a second source follower transistor (MP35), a current-sinking transistor (MN31), and a load circuit (212). The load circuit is formed of a load transistor (MN36) and a load resistor (R1). In an alternate embodiment, the load circuit is formed of a single load resistor. As a result, the amount of current injected into the first P-channel MOS transistor (MP32) is more precisely mirrored into the second P-channel MOS transistor (MP33).