发明授权
EP0931333B1 HERSTELLVERFAHREN FÜR EINE HOCH-EPSILON-DIELEKTRISCHE ODER FERROELEKTRISCHE SCHICHT
失效
制造工艺HIGH-EPSILON-电介质或铁电体层
- 专利标题： HERSTELLVERFAHREN FÜR EINE HOCH-EPSILON-DIELEKTRISCHE ODER FERROELEKTRISCHE SCHICHT
- 专利标题（英）： Process for the manufacture of a highly epsilon-dielectric or ferroelectric coating
- 专利标题（中）： 制造工艺HIGH-EPSILON-电介质或铁电体层
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申请号： EP97910214.2申请日： 1997-09-19
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公开(公告)号： EP0931333B1公开(公告)日： 2002-11-27
- 发明人: HARTNER, Walter , SCHINDLER, Günther , BRUCHHAUS, Rainer , PRIMIG, Robert
- 申请人： Infineon Technologies AG
- 申请人地址： St.-Martin-Strasse 53 81669 München DE
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： St.-Martin-Strasse 53 81669 München DE
- 代理机构： Zimmermann & Partner
- 优先权： DE19640241 19960930
- 国际公布： WO98014993 19980409
- 主分类号： H01L21/3205
- IPC分类号： H01L21/3205 ; H01L27/115
摘要：
The invention concerns a multi-step process. Stage one consists of sputtering the coating at a low temperature. Stage two involves application of an RTP process in an inert atmosphere at a medium or high temperature. In stage three the coating is tempered in an atmosphere containing oxygen at a low or medium temperature. Temperature load is significantly reduced in comparison with conventional processes so that when this process is used to produce an integrated memory cell oxidation of an underlying barrier coating can be prevented.
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