发明公开
EP0932258A4 METHOD AND CIRCUIT FOR DIGITAL MODULATION AND METHOD AND CIRCUIT FOR DIGITAL DEMODULATION
失效
VERFAHREN UND SCHALTUNG ZUR DIGITALEN MODULATION SOWIE DEMODULATIONSSCHALTUNG
- 专利标题: METHOD AND CIRCUIT FOR DIGITAL MODULATION AND METHOD AND CIRCUIT FOR DIGITAL DEMODULATION
- 专利标题(中): VERFAHREN UND SCHALTUNG ZUR DIGITALEN MODULATION SOWIE DEMODULATIONSSCHALTUNG
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申请号: EP97943166申请日: 1997-10-09
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公开(公告)号: EP0932258A4公开(公告)日: 1999-12-08
- 发明人: KUNISA AKIOMI , ITOH NOBUO , TAKAHASHI SEIICHIRO
- 申请人: SANYO ELECTRIC CO
- 专利权人: SANYO ELECTRIC CO
- 当前专利权人: SANYO ELECTRIC CO
- 优先权: JP29117196 1996-10-13; JP31430696 1996-11-10
- 主分类号: H03M7/14
- IPC分类号: H03M7/14 ; H03M5/14 ; H03M13/31
摘要:
In a digital modulation method, a plurality of kinds of multiplexed blocks are generated by respectively multiplexing a plurality of kinds of t-bit initial data upon the leading edges of input blocks (before conversion), and the exclusive OR of the leading (t) bits of each multiplexed block and the (t) bits immediately after the leading (t) bits is calculated. Then, the (t) bits immediately after the leading (t) bits are replaced on the basis of the above resultant, and the exclusive OR of the replaced (t) bits and the (t) bits immediately after the replaced (t) bits is calculated. Thereafter, the (t) bits immediately after the calculated (t) bits are replaced on the basis of the resultant on the exclusive - OR calculation. Thereafter, the convolution is similarly executed and the DC components of the converted blocks generated by the convolution are calculated and the minimum converted block is selected by comparing the magnitudes of the absolute values of the DC components with each other and outputted.
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