公开(公告)号：EP0933768A4

公开(公告)日：2000-10-04

申请号：EP98942365

申请日：1998-05-18

申请人： SANYO ELECTRIC CO

发明人： KUNISA AKIOMI ,  ITOH NOBUO

IPC分类号： G11B20/14 ,  G11B20/18 ,  H03M5/14 ,  H03M13/31 ,  H04L1/00 ,  H04L25/03 ,  H03M13/00

CPC分类号： H04L1/0057 ,  G11B20/1403 ,  G11B20/1426 ,  G11B20/18 ,  G11B20/1833 ,  G11B20/1866 ,  H03M5/145 ,  H03M13/31 ,  H04L1/0042 ,  H04L25/03866

摘要： A digital modulator for receiving a data stream and converting the received data stream into a bit stream, wherein: a multiplexed block is generated by multiplexing dummy data at arbitrary positions within blocks that are sequentially segmented from the data stream; a first Reed-Solomon code is generated by Reed-Solomon coding using the multiplexed blocks as information sections; a plurality of second Reed-Solomon codes are generated by adding a plurality of scrambling Reed-Solomon codes each having data which represent a different scramble method at the same position as that of the dummy data and having an information section and a parity section whose code lengths are equal to each other to the first Reed-Solomon code; and second Reed-Solomon codes having desired characteristic out of the second Reed-Solomon codes are outputted.

公开(公告)号：EP0886275A4

公开(公告)日：2000-03-08

申请号：EP97933058

申请日：1997-07-28

申请人： SANYO ELECTRIC CO

发明人： HORI YOSHIHIRO ,  MATSUYAMA HISASHI ,  KUNISA AKIOMI ,  ITOH NOBUO ,  TAKAHASHI SEIICHIRO ,  HIOKI TOSHIAKI ,  ASANO KENJI ,  MAMIYA NOBORU ,  UCHIHARA YOSHIHARU ,  NAKAO KENJI ,  SUMI SATOSHI ,  TORAZAWA KENJI

IPC分类号： G11B7/004 ,  G11B7/0045 ,  G11B7/007 ,  G11B11/105 ,  G11B20/14 ,  G11B27/24 ,  G11B7/00

CPC分类号： G11B7/0045 ,  G11B7/004 ,  G11B7/00718 ,  G11B7/00745 ,  G11B7/24082 ,  G11B11/10502 ,  G11B11/10504 ,  G11B11/10515 ,  G11B11/10595 ,  G11B20/1426 ,  G11B27/24 ,  G11B2020/1457 ,  G11B2220/216 ,  G11B2220/2562

摘要： A meandering groove is formed in a digital disk (10) by wobble signals wobbled to reproduce clock signals. An optical head (26) reads the wobbling signals and an address detecting circuit (4) detects an address signal multiplexed with the wobbling signals. A PLL oscillation circuit (24) outputs a clock signal synchronized with the wobbling signals, the data are modulated by means of a modulation circuit (16) based on the clock signal and a timing signal which is generated on the basis of the address signal, and the modulated data are recorded on the disk (10). To reproduce data, an A/D converter (42) converts an RF signal contained in the wobble signals into a digital signal and a demodulation circuit (44) demodulates the data and outputs the demodulated data.

公开(公告)号：EP0932258A4

公开(公告)日：1999-12-08

申请号：EP97943166

申请日：1997-10-09

申请人： SANYO ELECTRIC CO

发明人： KUNISA AKIOMI ,  ITOH NOBUO ,  TAKAHASHI SEIICHIRO

IPC分类号： H03M7/14 ,  H03M5/14 ,  H03M13/31

CPC分类号： H03M13/31 ,  H03M5/145

摘要： In a digital modulation method, a plurality of kinds of multiplexed blocks are generated by respectively multiplexing a plurality of kinds of t-bit initial data upon the leading edges of input blocks (before conversion), and the exclusive OR of the leading (t) bits of each multiplexed block and the (t) bits immediately after the leading (t) bits is calculated. Then, the (t) bits immediately after the leading (t) bits are replaced on the basis of the above resultant, and the exclusive OR of the replaced (t) bits and the (t) bits immediately after the replaced (t) bits is calculated. Thereafter, the (t) bits immediately after the calculated (t) bits are replaced on the basis of the resultant on the exclusive - OR calculation. Thereafter, the convolution is similarly executed and the DC components of the converted blocks generated by the convolution are calculated and the minimum converted block is selected by comparing the magnitudes of the absolute values of the DC components with each other and outputted.

摘要翻译： 在数字调制方法中，通过在输入块的前沿（转换之前）分别对多种t位初始数据进行多路复用来产生多种多路复用块，并且将前导（t） 计算每个多路复用块的位和紧接在前导（t）位之后的（t）位。 然后，基于上述结果替换紧接在前导（t）比特之后的（t）比特，并且在替换的（t）比特之后立即替换（t）比特和（t）比特的异或 被计算。 此后，紧接在计算的（t）位之后的（t）位在异或计算结果的基础上被替换。 此后，类似地执行卷积并且计算由卷积生成的转换块的DC分量，并且通过比较DC分量的绝对值的大小并将其输出来选择最小转换块。