发明公开
EP0999731A4 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
失效
GEDRUCKTE LEITERPLATTE UND VERFAHREN ZU DEREN HERSTELLUNG
- 专利标题: PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
- 专利标题(中): GEDRUCKTE LEITERPLATTE UND VERFAHREN ZU DEREN HERSTELLUNG
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申请号: EP98929570申请日: 1998-07-08
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公开(公告)号: EP0999731A4公开(公告)日: 2005-11-30
- 发明人: MIKADO YUKINOBU , HIRAMATSU YASUJI , EN HONCHIN
- 申请人: IBIDEN CO LTD
- 专利权人: IBIDEN CO LTD
- 当前专利权人: IBIDEN CO LTD
- 优先权: JP19635197 1997-07-08
- 主分类号: H05K3/46
- IPC分类号: H05K3/46 ; H05K1/11 ; H05K3/00 ; H05K3/28 ; H05K3/38 ; H05K3/42
摘要:
A multilayer printed wiring board (52) provided with a lower layer conductor circuit (26), an interlayer resin insulating layer (37) formed on the lower layer conductor circuit (26), an upper layer conductor circuit (44) formed on the interlayer resin insulating layer (37) and via-holes (51) connecting the lower layer conductor circuit (26) to the upper layer conductor circuit (44), wherein the lower layer conductor circuit (26) has a roughed surface (35) formed with an etchant containing a cupric complex and an organic acid, and the via-holes (51) are connected to the lower layer conductor circuit (26) through the roughed surface (35). Tight adhesion between the lower layer conductor circuit and the interlayer resin insulating layer and between the lower layer conductor circuit and the via-hole conductors can be improved and the high connection reliability of the via-hole parts is ensured even during heating or through heat cycle.
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