The present invention provides for an on-chip communications method with fully distributed control combining a fully-pipelined, fixed latency, synchronous bus (35) with a two-level arbitration scheme where the first level of arbitration is a framed, time division multiplexing arbitration scheme and the second level is a fairly-allocated round-robin scheme implemented using a token passing mechanism. Both the latency and the bandwidth allocation are software programmable in real-time operation of the system. The present invention also provides for a communication system where access to a shared resource (10, 15, 20) is controlled by the communications protocol. Access to and from the shared resource (10, 15, 20) from the subsystem is through a bus interface module (40, 45, 50, 55, 60). The bus interface modules (40, 45, 50, 55, 60) provide a level of indirection between the subsystem (25, 30) to be connected to the shared resource (10, 15, 20). This allows the decoupling of system performance requirements. Communication over the bus (35) is fully memory mapped.