发明授权
EP1029267B1 METHOD FOR MAINTAINING THE SYNCHRONIZED EXECUTION IN FAULT RESILIENT/FAULT TOLERANT COMPUTER SYSTEMS
有权
程序执行错误的同步操作SAFE /容错计算机系统的养护
- 专利标题: METHOD FOR MAINTAINING THE SYNCHRONIZED EXECUTION IN FAULT RESILIENT/FAULT TOLERANT COMPUTER SYSTEMS
- 专利标题(中): 程序执行错误的同步操作SAFE /容错计算机系统的养护
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申请号: EP98959455.1申请日: 1998-11-13
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公开(公告)号: EP1029267B1公开(公告)日: 2002-03-27
- 发明人: BISSETT, Thomas, D. , LEVEILLE, Paul, A. , MUENCH, Erik
- 申请人: Marathon Technologies Corporation
- 申请人地址: 1300 Massachusetts Avenue Boxboro, MA 01719 US
- 专利权人: Marathon Technologies Corporation
- 当前专利权人: Marathon Technologies Corporation
- 当前专利权人地址: 1300 Massachusetts Avenue Boxboro, MA 01719 US
- 代理机构: Jones, David Colin
- 优先权: US65790P 19971114
- 国际公布: WO9926133 19990527
- 主分类号: G06F9/00
- IPC分类号: G06F9/00
摘要:
A fault tolerant/fault resilient computer system includes at least two compute elements connected to at least one controller. Each compute element has clocks that operate asynchronously to clocks of the other compute elements. The compute elements operate in a first mode in which the compute elements each execute a first stream of instructions in emulated clock lockstep, and in a second mode in which the compute elements each execute a second stream of instructions in instruction lockstep. Each compute element may be a multi-processor compute element.
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