发明公开
EP1029276A4 SYSTEM AND METHOD FOR TERMINATING LOCK-STEP SEQUENCES IN A MULTIPROCESSOR SYSTEM
有权
系统和方法锁步序列在多处理器系统的最终
- 专利标题： SYSTEM AND METHOD FOR TERMINATING LOCK-STEP SEQUENCES IN A MULTIPROCESSOR SYSTEM
- 专利标题（中）： 系统和方法锁步序列在多处理器系统的最终
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申请号： EP98953560申请日： 1998-10-14
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公开(公告)号： EP1029276A4公开(公告)日： 2002-06-26
- 发明人: MILLER ROBERT J , MCDONALD EDWARD A
- 申请人： INTEL CORP
- 专利权人： INTEL CORP
- 当前专利权人： INTEL CORP
- 优先权： US94367697 1997-10-03
- 主分类号： G06F9/46
- IPC分类号： G06F9/46 ; G06F11/07 ; G06F13/16 ; G06F12/00 ; G06F13/00 ; G06F13/20 ; G06F13/26 ; G06F13/34
摘要：
There is provided, for use in a processing system containing a plurality of processors coupled to a main memory, a control circuit for perturbing a lock-step sequence of memory requests received from the processors. The control circuit comprises a memory request generator for generating at least one memory request operable to terminate the lock-step sequence of memory requests.
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