A semiconductor circuit for arithmetic operation, which uses a reduced circuit area and provides high-speed processing by restricting nonessentials. The semiconductor circuit comprises an arithmetic circuit (adders 1-3) and delay means (memory 4). The arithmetic circuit includes arithmetic units for operation on input data, and they operate on digits of input data in a period of operation time, and produce results of operation, together with data corresponding to a carry, if any. The output from the arithmetic circuit is delayed by one period of operation time through the delay means.