In order to prevent critical states of the operating condition of a MOS transistor output stage (1) the invention proposes using a circuit for de-activating said MOS transistor output stage (1), in particular a high power transistor, in the event of the occurrence of abnormal potentials on at least one monitored line (4), means being provided for controlling the MOS transistor output stage. The invention is characterised in that means (3) are also provided for monitoring the line (4). The MOS transistor output stage (1) can also be de-activated by means (3) for monitoring the line (4), independently of the means (2) for controlling the MOS transistor output stage (1) (de-activating path II).