A semiconductor circuit of large-scale integration for storing analog data and multivalued data accurately at high speed. The semiconductor circuit comprises memory cells for analog and multivalued signals, a read circuit provided with an output to produce voltage indicating a value stored in the memory cell, a comparator provided with an output to produce an end-of-write signal when the voltage at the output of the read circuit becomes equal to a predetermined voltage, a write voltage control circuit having an input for receiving analog and multivalued voltage as write voltage of the memory cell and having an output for producing voltage corresponding to the voltage value, and a write voltage switch circuit for supplying the output voltage from the write voltage control circuit to the memory cell until the end-of-write signal appears at the output of the comparator.