- 专利标题： INTEGRIERTER SPEICHER MIT REDUNDANZ
- 专利标题（英）： Ic memory having a redundancy
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申请号： EP99966804.9申请日： 1999-12-01
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公开(公告)号： EP1141834B1公开(公告)日： 2002-09-04
- 发明人: HÖNIGSCHMID, Heinz , BRAUN, Georg , MAJDIC, Andrej
- 申请人： Infineon Technologies AG
- 申请人地址： St.-Martin-Strasse 53 81669 München DE
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： St.-Martin-Strasse 53 81669 München DE
- 代理机构： Epping Hermann & Fischer
- 优先权： DE19859518 19981222
- 国际公布： WO00038065 20000629
- 主分类号： G06F11/20
- IPC分类号： G06F11/20
摘要：
The invention relates to an IC memory with a normal bit line (BL) for transmitting data from or to normal memory cells (MC) connected to said line. The IC memory is further provided with a normal sense amplifier (SA1) which is linked via a line (L1) at the one end with the normal bit line (BL) and at the other end with a data line (DQ1). Said sense amplifier amplifies the data read out from the normal memory cells (MC). The memory also comprises a redundant sense amplifier (RSA1) for replacing the normal sense amplifier (SA1) in the case of a redundancy. Said redundant sense amplifier is also linked at the one end with the line (L1) and at the other end with the data line (DQ1) and amplifies the data read out from the normal memory cells (MC) in the case of a redundancy.
公开/授权文献
- EP1141834A1 INTEGRIERTER SPEICHER MIT REDUNDANZ 公开/授权日：2001-10-10
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