A QAM demodulator (99) having a first automatic gain control circuit (10) which outputs a first signal (94) that is a function of the received signal, the first signal being used to control the gain of an amplifier which supplies the input of an A/D converter (25), and a second automatic gain controller (20) which outputs a second signal derived from the QAM circuit after filtering, the second signal controlling the gain of a digital multiplier (210) which produces a signal which feeds into an equalizer (45) by way of a receive filter (40). The dual automatic gain control circuits (10, 20), situated before and after the receive filters (40), allow for better resistance to non-linearity caused by signals in adjacent channels. Additionally, the dual automatic gain control circuits allow for the amplification level of the signal to be limited before the demodulator to eliminate signal distortion and to be set to the correct level internally with digital gain. Also, there is no saturation of the A/D converter (25) since there is no QAM feedback to analog circuits. This architecture is particularly efficient in a variable rate transmission scheme.