发明公开
- 专利标题： Improvements in DMA controller systems
- 专利标题（中）： VerbesserungenfürDMA-Kontrolliersysteme
-
申请号： EP02254423.3申请日： 2002-06-25
-
公开(公告)号： EP1271329A2公开(公告)日： 2003-01-02
- 发明人: Evered, Jonathon , Fisher, Daniel , Aldridge, David , Buckley, Matthew Charles , Walker, Anthony Mark , Worroll, Maison Lloyd , Watkins, Andrew
- 申请人： Zarlink Semiconductor Limited
- 申请人地址： Cheney Manor Swindon, Wiltshire SN2 2QW GB
- 专利权人： Zarlink Semiconductor Limited
- 当前专利权人： Zarlink Semiconductor Limited
- 当前专利权人地址： Cheney Manor Swindon, Wiltshire SN2 2QW GB
- 代理机构： Asquith, Julian Peter
- 优先权： GB0115907 20010629
- 主分类号： G06F13/28
- IPC分类号： G06F13/28
摘要：
A system is provided for transferring data from a first network, which is packet based, to a second network, the system comprising:
a physical layer input device, an input FIFO, a DMA controller for transferring data between addresses, an output FIFO, and a physical layer output device,
wherein the physical layer input device places beginning and end markers around packets in the input FIFO, and the DMA controller monitors the data which it transfers, and transfers data between said beginning and end markers, and ceases a transfer when an end of packet marker is reached.
a physical layer input device, an input FIFO, a DMA controller for transferring data between addresses, an output FIFO, and a physical layer output device,
wherein the physical layer input device places beginning and end markers around packets in the input FIFO, and the DMA controller monitors the data which it transfers, and transfers data between said beginning and end markers, and ceases a transfer when an end of packet marker is reached.
公开/授权文献
- EP1271329A3 Improvements in DMA controller systems 公开/授权日：2005-06-08
信息查询
