发明公开
EP1351289A1 Method and apparatus for forming fine circuit interconnects
审中-公开
Verfahren undGerätzur Herstellung feiner Verbindungsleitungen
- 专利标题: Method and apparatus for forming fine circuit interconnects
- 专利标题(中): Verfahren undGerätzur Herstellung feiner Verbindungsleitungen
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申请号: EP03007398.5申请日: 2003-04-02
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公开(公告)号: EP1351289A1公开(公告)日: 2003-10-08
- 发明人: Ito, Nobukazu , Hongo, Akihisa , Fukunaga, Akira , Nagai, Mizuki , Kimizuka, Ryoichi , Kobayashi, Takeshi , Sato, Takuro
- 申请人: EBARA CORPORATION , NEC Electronics Corporation
- 申请人地址: 11-1, Haneda Asahi-cho Ohta-ku, Tokyo JP
- 专利权人: EBARA CORPORATION,NEC Electronics Corporation
- 当前专利权人: EBARA CORPORATION,NEC Electronics Corporation
- 当前专利权人地址: 11-1, Haneda Asahi-cho Ohta-ku, Tokyo JP
- 代理机构: Wagner, Karl H., Dipl.-Ing.
- 优先权: JP2002099970 20020402
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/288
摘要:
There is provided a method and apparatus for forming fine circuit interconnects that can form, by copper plating, copper interconnects in which movement of copper atoms is retarded or suppressed whereby electromigration is prevented. The method for forming fine circuit interconnects, comprising, providing a substrate for electronic circuit having fine circuit patterns which are covered with a barrier layer (4) and optionally a seed layer (5), forming a first plated film (6) on the surface of the substrate by copper alloy plating, and forming a second plated film (7) on the surface of the first plated film by copper plating.
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