发明公开
EP1355358A2 Thin film semiconductor memory and manufacture method therefor
有权
Dünnschicht-Halbleiterspeicher und Verfahren zu seiner Herstellung
- 专利标题: Thin film semiconductor memory and manufacture method therefor
- 专利标题(中): Dünnschicht-Halbleiterspeicher und Verfahren zu seiner Herstellung
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申请号: EP03252253.4申请日: 2003-04-09
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公开(公告)号: EP1355358A2公开(公告)日: 2003-10-22
- 发明人: Hayashi, Yutaka , Hasegawa, Hisashi, c/o Seiko Instruments Inc. , Yoshida, Yoshifumi, c/o Seiko Instruments Inc. , Osanai, Jun, c/o Seiko Instruments Inc.
- 申请人: Seiko Instruments Inc. , Hayashi, Yutaka
- 申请人地址: 8, Nakase 1-chome, Mihama-ku Chiba-shi, Chiba JP
- 专利权人: Seiko Instruments Inc.,Hayashi, Yutaka
- 当前专利权人: Seiko Instruments Inc.,Hayashi, Yutaka
- 当前专利权人地址: 8, Nakase 1-chome, Mihama-ku Chiba-shi, Chiba JP
- 代理机构: Sturt, Clifford Mark
- 优先权: JP2002108423 20020410; JP2002230397 20020807; JP2003086898 20030327
- 主分类号: H01L27/108
- IPC分类号: H01L27/108
摘要:
A memory cell which is formed on a fully depleted SOI or other semiconductor thin film and which operates at low voltage without needing a conventional large capacitor is provided as well as a memory cell array. The semiconductor thin film is sandwiched between first and second semiconductor regions which face each other across the semiconductor thin film and which have a first conductivity type. A third semiconductor region having the opposite conductivity type is provided in an extended portion of the semiconductor thin film. From the third semiconductor region, carriers of the opposite conductivity type are supplied to and accumulated in the semiconductor thin film portion to change the gate threshold voltage of a first conductivity type channel that is induced by a first conductive gate voltage in the semiconductor thin film between the first and second semiconductor regions through an insulating film.
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