发明公开
EP1538663A2 Wafer backside processing method and corresponding processing apparatus
审中-公开
一种用于晶片的背面的治疗和相应的处理装置处理
- 专利标题: Wafer backside processing method and corresponding processing apparatus
- 专利标题(中): 一种用于晶片的背面的治疗和相应的处理装置处理
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申请号: EP04027591.9申请日: 2004-11-19
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公开(公告)号: EP1538663A2公开(公告)日: 2005-06-08
- 发明人: Kawashima, Isamu
- 申请人: TOKYO SEIMITSU CO.,LTD.
- 申请人地址: 7-1, Shimorenjaku 9-chome Mitaka-shi Tokyo JP
- 专利权人: TOKYO SEIMITSU CO.,LTD.
- 当前专利权人: TOKYO SEIMITSU CO.,LTD.
- 当前专利权人地址: 7-1, Shimorenjaku 9-chome Mitaka-shi Tokyo JP
- 代理机构: Rackham, Stephen Neil
- 优先权: JP2003403247 20031202
- 主分类号: H01L21/3065
- IPC分类号: H01L21/3065 ; H01L21/304 ; H01L21/316 ; H01L21/00 ; B24B7/22
摘要:
There are provided a wafer processing method comprising the steps of grinding an underside (21) of a wafer which is provided, on its front surface (29), with a plurality of semiconductor devices (10); polishing a ground surface (22) formed by the grinding operation; and carrying out a plasma-processing for a polished surface (23) formed by the polishing operation under a predetermined gaseous atmosphere in a plasma chamber, to form an oxide layer on the polished surface, and a wafer processing method comprising the steps of carrying out a first plasma-processing for a polished surface formed by the polishing operation under a first gaseous atmosphere (CF 4 or SF 6 ) in a plasma chamber, to clean the polished surface; and carrying out a second plasma-processing for the polished surface after the cleaning operation under a second gaseous atmosphere (O 2 ) in the plasma chamber, to form an oxide layer on the polished surface, and a wafer processing apparatus for carrying out these methods. Thus, the wafer can be processed while the occurrence of an electrical failure in a thin wafer is restricted.
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