发明公开
- 专利标题： LOAD STORE UNIT WITH REPLAY MECHANISM
- 专利标题（中）： 带有重复机制负载存储单元
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申请号： EP04753838.4申请日： 2004-06-02
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公开(公告)号： EP1644823A1公开(公告)日： 2006-04-12
- 发明人: FILIPPO, Michael, A. , PICKETT, James, K. , SANDER, Benjamin, T. , GOPAL, Rama, S.
- 申请人： ADVANCED MICRO DEVICES, INC.
- 申请人地址： One AMD Place, Mail Stop 68, P.O. Box 3453 Sunnyvale, California 94088-3453 US
- 专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址： One AMD Place, Mail Stop 68, P.O. Box 3453 Sunnyvale, California 94088-3453 US
- 代理机构： Wright, Hugh Ronald
- 优先权： US458457 20030610
- 国际公布： WO2004111839 20041223
- 主分类号： G06F9/38
- IPC分类号： G06F9/38
摘要：
A microprocessor (100) may include a scheduler (118) configured to issue operations and a load store unit (126C) configured to execute memory operations issued by the scheduler (118). The load store unit (126C) is configured to store information identifying memory operations issued to the load store unit (126C). In response to detection of incorrect data speculation for one of the issued memory operations, the load store unit (126C) is configured to replay at least one of the issued memory operations by providing an indication to the scheduler (118). The scheduler (118) is configured to responsively reissue the memory operations identified by the load store unit (126C).
公开/授权文献
- EP1644823B1 LOAD STORE UNIT WITH REPLAY MECHANISM 公开/授权日：2007-11-21
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