发明公开
EP1684307A1 Method, circuit and systems for erasing one or more non-volatile memory cells
审中-公开
的方法，电路和系统用于擦除一个或多个非易失性存储器单元
- 专利标题： Method, circuit and systems for erasing one or more non-volatile memory cells
- 专利标题（中）： 的方法，电路和系统用于擦除一个或多个非易失性存储器单元
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申请号： EP06100524.5申请日： 2006-01-18
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公开(公告)号： EP1684307A1公开(公告)日： 2006-07-26
- 发明人: Shappir, Assaf , Eisen, Shai
- 申请人： Saifun Semiconductors Ltd.
- 申请人地址： Elrod Building, 45 Hamelacha Street, Sapir Industrial Area Netanya 42505 IL
- 专利权人： Saifun Semiconductors Ltd.
- 当前专利权人： Saifun Semiconductors Ltd.
- 当前专利权人地址： Elrod Building, 45 Hamelacha Street, Sapir Industrial Area Netanya 42505 IL
- 代理机构： Andersson, Björn E.
- 优先权： US644569 20050119
- 主分类号： G11C16/14
- IPC分类号： G11C16/14
摘要：
The present invention is a method, circuit and system for erasing one or more non-volatile memory ("NVM") cells in an NVM array or array segment, According to some embodiments of the present invention, one or more erase pulse parameters may be associated with each of a number of array segments within an NVM array. Separate erase pulse parameters may be associated with anywhere from one to all of the array segments within an NVM array. According to some embodiments of the present invention, a characteristic of an erase pulse (e.g. pulse amplitude, pulse duration, etc.) applied to one or more MVM cells within art array segment may be at least partially on one or more erase pulse parameters associated with the given array segment.
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