发明公开
EP1695357A2 NAND MEMORY ARRAY INCORPORATING MULTIPLE WRITE PULSE PROGRAMMING OF INDIVIDUAL MEMORY CELLS AND METHOD FOR OPERATION OF SAME
审中-公开
具有多个写脉冲编程单个存储单元和操作THEREFOR法的NAND存储矩阵
- 专利标题: NAND MEMORY ARRAY INCORPORATING MULTIPLE WRITE PULSE PROGRAMMING OF INDIVIDUAL MEMORY CELLS AND METHOD FOR OPERATION OF SAME
- 专利标题(中): 具有多个写脉冲编程单个存储单元和操作THEREFOR法的NAND存储矩阵
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申请号: EP04817933.7申请日: 2004-12-02
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公开(公告)号: EP1695357A2公开(公告)日: 2006-08-30
- 发明人: CHEN, En-Hsing , WALKER, Andrew J. , SCHEUERLEIN, Roy E. , NALLAMOTHU, Sucheta , ILKBAHAR, Alper , FASOLI, Luca G.
- 申请人: Sandisk 3D LLC
- 申请人地址: 601 McCarthy Boulevard Milpitas, CA 95035-7932 US
- 专利权人: Sandisk 3D LLC
- 当前专利权人: Sandisk 3D LLC
- 当前专利权人地址: 601 McCarthy Boulevard Milpitas, CA 95035-7932 US
- 代理机构: Hitchcock, Esmond Antony
- 优先权: US729844 20031205
- 国际公布: WO2005057585 20050623
- 主分类号: G11C16/10
- IPC分类号: G11C16/10 ; G11C11/56 ; G11C5/02
摘要:
An exemplary NAND string memory array provides for capacitive boosting of a half-selected memory cell channel to reduce program disturb effects of the half selected cell. To reduce the effect of leakage current degradation of the boosted level, multiple programming pulses of a shorter duration are employed to limit the time period during which such leakage currents may degrade the voltage within the unselected NAND strings. In addition, multiple series select devices at one or both ends of each NAND string further ensure reduced leakage through such select devices, for both unselected and selected NAND strings.
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