发明公开
- 专利标题: Semiconductor device and method for manufacturing same
- 专利标题(中): 半导体器件及其制造方法
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申请号: EP08011174.3申请日: 2003-07-09
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公开(公告)号: EP1968104A3公开(公告)日: 2008-11-05
- 发明人: Kusumoto, Osamu , Kitabatake, Makoto , Takahashi, Kunimasa , Yamashita, Kenya c/o Matsushita Electric Industrial Co., Ltd , Miyanaga, Ryoko , Uchida, Masao
- 申请人: Matsushita Electric Industrial Co., Ltd.
- 申请人地址: 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 JP
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 JP
- 代理机构: Grünecker, Kinkeldey, Stockmair & Schwanhäusser Anwaltssozietät
- 优先权: JP2002202527 20020711; JP2003021692 20030130
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L29/78 ; H01L21/336 ; H01L21/82 ; H01L29/872 ; H01L29/812 ; H01L29/45 ; H01L27/06 ; H01L29/772
摘要:
An accumulation-mode MISFET comprises: a high-resistance SiC layer 102 epitaxially grown on a SiC substrate 101; a well region 103; an accumulation channel layer 104 having a multiple δ-doped layer formed on the surface region of the well region 103; a contact region 105; a gate insulating film 108; and a gate electrode 110. The accumulation channel layer 104 has a structure in which undoped layers 104b and δ-doped layers 104a allowing spreading movement of carriers to the undoped layers 104b under a quantum effect are alternately stacked. A source electrode 111 is provided which enters into the accumulation channel layer 104 and the contact region 105 to come into direct contact with the contact region 105. It becomes unnecessary that a source region is formed by ion implantation, leading to reduction in fabrication cost.
公开/授权文献
- EP1968104A2 Semiconductor device and method for manufacturing same 公开/授权日:2008-09-10
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