发明公开
EP2186004A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME 有权
VERFAHREN ZU SEINER STEUERUNG的HALBLEITERSPEICHERBAUEMENT

  • 专利标题: SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME
  • 专利标题(中): VERFAHREN ZU SEINER STEUERUNG的HALBLEITERSPEICHERBAUEMENT
  • 申请号: EP08791594.8
    申请日: 2008-07-17
  • 公开(公告)号: EP2186004A1
    公开(公告)日: 2010-05-19
  • 发明人: KANNO, ShinichiUCHIKAWA, Hironori
  • 申请人: Kabushiki Kaisha Toshiba
  • 申请人地址: 1-1 Shibaura 1-chome Minato-ku Tokyo 105-8001 JP
  • 专利权人: Kabushiki Kaisha Toshiba
  • 当前专利权人: Kabushiki Kaisha Toshiba
  • 当前专利权人地址: 1-1 Shibaura 1-chome Minato-ku Tokyo 105-8001 JP
  • 代理机构: HOFFMANN EITLE
  • 优先权: JP2007225996 20070831
  • 国际公布: WO2009028281 20090305
  • 主分类号: G06F11/10
  • IPC分类号: G06F11/10
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME
摘要:
A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
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