A system comprising: a data-bus, system memory, a first processor arranged to receive an input stream, and a second processor programmed to apply one or more security algorithms to secure packets of the input stream to generate at least partially security-processed packets. The system further comprises first queuing circuitry, separate from the data-bus and memory, to queue packets for transfer from the first to the second processor; and second packet queuing circuitry, separate from the data-bus and memory, to queue packets for transfer from the second to the first processor. The first processor transfers the secure packets to the second processor via the first queuing circuitry for security processing. The second processor returns the security-processed packets to the first processor via the second queuing circuitry. The first processor then further processes the security-processed packets, other than by applying a security algorithm, to generate output data for a user output apparatus.