A method for fabricating a high-voltage transistor with an extended drain region comprises forming an epitaxial layer (101) on a substrate (100), the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer, wherein the mesa has a lateral width that is less than 20% of a depth of the trenches. A dielectric layer (102) is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining portions of the trenches are then filled with a conductive material to form first and second field plate members (103) that are insulated from the substrate and the epitaxial layer.