A signal inversion unit inverts an adjustment pattern signal input as received data. A clock adjustment control circuit acquires a first TAP value adjusted and obtained when a phase adjusting operation is performed on a clock adjustment circuit in a state in which the adjustment pattern signal is not inverted, a first detection frequency of the adjustment pattern signal in a runtime of the operation, a second TAP value adjusted and obtained when the phase adjusting operation is performed in a state in which the adjustment pattern signal is inverted by the signal inversion unit, and a second detection frequency of the adjustment pattern signal in the runtime of the operation. A controller tests an operating state of the phase adjusting operation based on the first and second TAP values and the first and second detection frequencies of the adjustment pattern obtained by the clock adjustment control circuit.