The invention relates to a method of using a CMOS chip for direct charged particle counting. To avoid reset noise, it is known to use Correlative Double Sampling: for each signal value the pixel is sampled twice: once (204) directly after reset and once (206) after an integration time. The signal is then determined (208) by subtracting the reset value from the later acquired value, and the pixel is reset again (202). Typically the integration time is chosen sufficiently short that the chance that two particles impinge on one pixel is negligible, thereby enabling event counting.
Although this technique removes reset noise and fixed pattern noise, it also lowers the image rate to half the frame rate, as a pixel needs to be sampled twice for one signal value.
The invention proposes to reset the pixel only after a large number of read-outs. This is based on the insight that typically a large number of events, typically approximately 10, are needed to cause a full pixel. By either resetting after a large number of images, or when one pixel of the image shows a signal above a predetermined value (for example 0.8 x the full-well capacity), the image speed can be almost doubled when compared to the prior art method, using a reset after acquiring a signal.