发明公开
EP2673685A2 MECHANISM FOR LOW POWER STANDBY MODE CONTROL CIRCUIT 审中-公开
机构控制电路,具有低功耗待机模式

MECHANISM FOR LOW POWER STANDBY MODE CONTROL CIRCUIT
摘要:
Embodiments of the invention are generally directed to a low power standby mode control circuit. An embodiment of an apparatus includes a processor, an interface for a connection with a second apparatus, and an operational circuit, wherein the processor is to disable one or more power connections to the operational circuit in a standby mode. The apparatus further includes a standby mode control circuit, the standby control circuit to operate using a standby power source, wherein the standby mode control circuit is to detect a stimulus signal from the second apparatus and in response to the stimulus signal the standby control circuit is to signal the processor, the processor to enable the one or more power connections of the operational circuit.
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